Rabaey, J.M., Chu, C., Hoang, P., and Potkonjak, M.
IEEE Design & Test of Computers. June 1991, Vol. 8 Issue 2, p40, 12 p. chart Datapath section of the Viterbi processor.
Computer-Aided Design, Circuit Design, Prototype, New Technique, Technology, Integrated Systems, Real-Time System, California, University of (Berkeley), Research and Development, and University of California, Berkeley -- Research
The University of California, Berkeley, has developed the Hyper system that provides a completely integrated synthesis environment for real-time prototyping of datapath-intensive architectures, such as those used in high-performance, real-time systems in telecommunications, speech, video and image processing. Synthesis for real-time applications is defined as the hardware implementation with the least area, given an input computational graph, a number of real-time constraints and a hardware cell library. Hyper can generate a simulation model of the flow graph at any point, allowing the correctness of the executed operations to be verified and their effects on such performance parameters as the signal-to-noise ratio to be checked. The overall synthesis procedure in Hyper is implemented as a search process; new solutions are proposed by the system by executing such basic moves as adding or removing resources, changing the time allocation for different subgraphs in the algorithm, and applying an optimizing graph transformation.