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1. An HLA-Based Formal Co-Simulation Approach for Rapid Prototyping of Heterogeneous Mixed-Signal SoCs [2017]

  • Daejin PARK, Moon Gi SEOK, and Tag Gon KIM
  • IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. 2017, E100.A(7):1374

2. Design and Prototyping of Error Resilient Multi-Server Video Streaming System with Inter-Stream FEC [2013]

  • Akihiro FUJIMOTO, Hideki TODE, Koso MURAKAMI, and Yusuke HIROTA
  • IEICE Transactions on Communications. 2013, E96.B(7):1826

3. Prototyping design of a flexible DSP block with pipeline structure for FPGA [2016]

  • Hanyang Xu, Jian Wang, and Jinmei Lai
  • IEICE Electronics Express. 2016, 13(17):20160676

4. FPGA design, simulation and prototyping of a high speed 32-bit pipeline multiplier based on Vedic mathematics [2015]

  • Abdul Rahman M. Alamoud, Shuja Ahmad Abbasi, and Zulhelmi
  • IEICE Electronics Express. 2015, 12(16):20150450

5. Optical Network Management System for Instant Provisioning of QoS-Aware Path and Its Software Prototyping with OpenFlow [2014]

  • Akira FUKUSHIMA, Hideki TODE, Masashi TAKADA, and Yosuke TANIGAWA
  • IEICE Transactions on Communications. 2014, E97.B(7):1313

6. Optimal Time-Multiplexing in Inter-FPGA Connections for Accelerating Multi-FPGA Prototyping Systems [2008]

  • Atsushi TAKAHASHI, Masato INAGI, Yasuhiro TAKASHIMA, and Yuichi NAKAMURA
  • IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. 2008, E91.A(12):3539

7. A Design and Prototyping of In-Network Processing Platform to Enable Adaptive Network Services [2013]

  • Masato TSURU, Masayoshi SHIMAMURA, and Takeshi IKENAGA
  • IEICE Transactions on Information and Systems. 2013, E96.D(2):238

8. Finite Input-Memory Automaton Based Checker Synthesis of SystemVerilog Assertions for FPGA Prototyping [2009]

  • Chengjie ZANG and Shinji KIMURA
  • IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. 2009, E92.A(6):1454

9. A compact cluster computer with embedded CPUs and its application to rapid prototyping of fingerprint verification system [2005]

  • Koichi Ito, Takafumi Aoki, Tatsuo Higuchi, and Yoshifumi Sasaki
  • IEICE Electronics Express. 2005, 2(17):465

10. Prototyping Tool for Web-Based Multiuser Online Role-Playing Game [2008]

  • Masaru KAMADA, Shusuke OKAMOTO, and Tatsuhiro YONEKURA
  • IEICE Transactions on Information and Systems. 2008, E91.D(6):1700

11. A ZigBee/Wi-Fi Cooperative Channel Control Method and Its Prototyping

  • Hideki TODE, Kazuhiko KINOSHITA, Shu NISHIKORI, Takashi WATANABE, and Yosuke TANIGAWA
  • IEICE Transactions on Communications. :2019

12. A Guide of Fingerprint Based Radio Emitter Localization Using Multiple Sensors [2018]

  • Azril HANIZ, Gia Khanh TRAN, Jun-ichi TAKADA, Kei SAKAGUCHI, Kentaro SANO, Ryosuke IWATA, Ryouta KOSAKA, Tao YU, and Yusuke KUKI
  • IEICE Transactions on Communications. 2018, E101.B(10):2104

13. Inter-FPGA Routing for Partially Time-Multiplexing Inter-FPGA Signals on Multi-FPGA Systems with Various Topologies [2015]

  • Masato INAGI, Shin'ichi WAKABAYASHI, Yasuhiro TAKASHIMA, and Yuichi NAKAMURA
  • IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. 2015, E98.A(12):2572

14. A Prototype System for Many-Core Architecture SMYLEref with FPGA Evaluation Boards [2013]

  • Koji INOUE, Masaaki KONDO, Son-Truong NGUYEN, and Tomoya HIRAO
  • IEICE Transactions on Information and Systems. 2013, E96.D(8):1645

15. Automatic Allocation of Training Data for Speech Understanding Based on Multiple Model Combinations [2012]

  • Hiroshi G. OKUNO, Kazunori KOMATANI, Kotaro FUNAKOSHI, Masaki KATSUMARU, Mikio NAKANO, and Tetsuya OGATA
  • IEICE Transactions on Information and Systems. 2012, E95.D(9):2298

16. Asynchronous Circuit Design on Field Programmable Gate Array Devices [2012]

  • Jung-Lin YANG, Pei-Hsuan YU, and Shin-Nung LU
  • IEICE Transactions on Electronics. 2012, E95.C(4):516

17. Smart Farm: Applying the Use of NodeMCU, IOT, NETPIE and LINE API for a Lingzhi Mushroom Farm in Thailand [2018]

  • Anukit SAOKAEW, Ekkarat BOONCHIENG, and Oran CHIEOCHAN
  • IEICE Transactions on Communications. 2018, E101.B(1):16

18. A Built-in Test Circuit for Electrical Interconnect Testing of Open Defects in Assembled PCBs [2016]

  • Akira ONO, Hiroyuki YOTSUYANAGI, Masaki HASHIZUME, Shohei SUENAGA, Shyue-Kung LU, Widiant, and Zvi ROTH
  • IEICE Transactions on Information and Systems. 2016, E99.D(11):2723

19. A Proposition of 600Mbps WLAN-Like System with Low-Complexity MIMO Decoder for FPGA Implementation [2011]

  • Baiko SAI, Hiroshi OCHI, Masayuki KUROSAKI, Ryuta IMASHIOYA, Wahyul Amien SYAFEI, and Yuhei NAGAO
  • IEICE Transactions on Communications. 2011, E94.B(2):491

20. Hardware Accelerator for Run-Time Learning Adopted in Object Recognition with Cascade Particle Filter [2009]

  • Hiroki SUGANO, Hiroyuki OCHI, Ryusuke MIYAMOTO, and Yukihiro NAKAMURA
  • IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. 2009, E92.A(11):2801

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