IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems. 04/01/2011, Vol. 30 Issue 4, p473-491. 19p.
PROTOTYPES, ALGORITHMS, INDUSTRIAL design, FIELD programmable gate arrays -- Design & construction, SYSTEMS on a chip, CASE studies, and EXPERIMENTS
Escalating system-on-chip design complexity is pushing the design community to raise the level of abstraction beyond register transfer level. Despite the unsuccessful adoptions of early generations of commercial high-level synthesis (HLS) systems, we believe that the tipping point for transitioning to HLS methodology is happening now, especially for field-programmable gate array (FPGA) designs. The latest generation of HLS tools has made significant progress in providing wide language coverage and robust compilation technology, platform-based modeling, advancement in core HLS algorithms, and a domain-specific approach. In this paper, we use AutoESL's AutoPilot HLS tool coupled with domain-specific system-level implementation platforms developed by Xilinx as an example to demonstrate the effectiveness of state-of-art C-to-FPGA synthesis solutions targeting multiple application domains. Complex industrial designs targeting Xilinx FPGAs are also presented as case studies, including comparison of HLS solutions versus optimized manual designs. In particular, the experiment on a sphere decoder shows that the HLS solution can achieve an 11–31% reduction in FPGA resource usage with improved design productivity compared to hand-coded design. [ABSTRACT FROM AUTHOR]
ELECTRONIC industries, INDUSTRIAL design, AUTOMATION, COMPUTER-aided design, SYSTEMS on a chip, FIELD programmable gate arrays, and DIGITAL signal processing
Electronic-system-level (ESL) design tools, verification and power analysis lead the pack at the 42nd Design Automation Conference to be held in Anaheim, California on June 13-17, 2005. Synfora will show the 5.01 release of its PICO Express application-engine synthesis tool for system-on-a-chip design. The new release features enhanced capabilities for algorithms in several application areas. Celoxica will show RC10 programmable platform for ESL training, design evaluation, and rapid prototyping. Fitted with a high-density field programmable gate arrays (FPGA), the board features Virtual Peripherals that enable applications programmed into the FPGA to connect to PC-hosted Ethernet and video resources. Meanwhile, AccelChip’s 2005.1 version of Digital Signal Processing (DSP) Synthesis provides a Matlab/Simulink design flow for DSP implementation in FPGA.
ENGINEERING design, INDUSTRIAL engineering, INDUSTRIAL design, TECHNOLOGICAL progress, ENERGY consumption, AUTOMATION, STANDARDIZATION, ELECTRONIC systems, SYSTEMS on a chip, and EMBEDDED computer systems
The article presents forecasts for new developments related to the electronic design automation (EDA) industry for 2008 in the context of new methodologies, tools and standards to achieve the low-power design. It mentions that in 2008, role of advanced techniques and tools such as sequential equivalence checking for verification will be increased to enable system-on-a-chip (SoC) designers to achieve power optimization, and use electronic system-level (ESL) methodologies. It states that in 2008, the industry will agree on a single IEEE standard in the design of power formats, there will be a transition from timing-driven to power-driven place-and-route tools to help designers identify their key sources of power consumption, and designers will try to improve the prototyping process.