COMPUTER-aided design, COMPUTER-aided engineering, RAPID prototyping, ENGINEERING, and DESIGN
Feature modeling has simplified, improved and accelerated the Computer-Aided Design (CAD) process. However, this modeling paradigm still has some serious shortcomings. Firstly, its domain is currently restricted to regular and simple freeform shapes. Secondly, most current feature modelers do not allow new class definitions, but instead provide design with predefined classes. In this paper, we propose a method to solve these shortcomings as follows. The shape domain is extended to include more general freeform features. To achieve this, a generic freeform feature taxonomy is developed. New feature classes can then be defined by deriving from this taxonomy, at any level of abstraction per design intent, through an object-oriented approach. In particular specification of class parameters and constraints, in the new classes, is demonstrated. [ABSTRACT FROM AUTHOR]
ENGINEERING, COMPUTER systems, RANDOM access memory, AUTOMOBILE industry, DESIGN, ELECTRONIC systems, and TELEMATICS
This article reports that a flexible automotive reference platform centered on Xilink field programmable gate array technology addresses the need for rapid design prototyping for use in automotive/telematics applications. The approach includes small modules that interconnect to form a complete system. The core of the system is a central processing unit module with memory that includes flash, SmartMedia flash, and SDRAM/DDRAm. As with any reference platform, embedded software is needed to run the system. The reference platform is genuinely a full system, complete with hardware, firmware, and software.
Electronic Engineering Times (01921541). 4/30/2007, Issue 1473, p50-50. 1/8p.
ENGINEERING, ELECTRONIC circuit design, FIELD programmable gate arrays, DIGITAL electronics, and DESIGN
The article discusses the availability of Virtex-4 FPGA reference design, an application note and evaluation module from Xilinx Inc. Designer can purchase the TSW1200EVM evaluation module thru a rapid prototyping environment for designing a digital circuit which directly interface to the A/Ds. Furthermore, Xilinx reference design accepts upto four simultaneous A/D design channels which provides automatic deskew and clock alignment.