MICROELECTRONICS, TECHNOLOGICAL innovations, SEMICONDUCTOR wafers, and CREATIVE ability in technology
The article reports that in keeping with its usual practice, TSMC Corp. has come up with a process on the half-node at 55nm. It offers the same speed as the 65nm process with 10 to 20 percent lower power consumption. TSMC intends to make the 55nm process available also to customers using its CyberShuttle wafer-sharing prototyping program that allows multiple customers and IP suppliers to share the costs of a single maskset and prototype wafers on a pilot run.
MICROELECTRONICS, SYSTEMS design, UNIVERSITIES & colleges, ELECTRONIC systems, and ELECTRONICS
This article reports that research activities need a design infrastructure which offers affordable access to design tools and prototyping facilities, according to representatives from British universities. A gathering of academics attending a "Common Vision" workshop at the end of the year 2004 concluded that all microelectronics design in universities and other academic groups requires a design infrastructure that enables state-of-the-art design tools and access to prototype fabrication to be available to academic groups at affordable cost. The influential group of academics from the universities of Manchester, Southampton, Belfast and Edinburgh were responding to what they see as a lack of coherence in microelectronics design activities across the country.
UNIVERSITIES & colleges, MICROELECTRONICS, SYSTEMS design, ELECTRONIC circuit design, ELECTRONIC systems, and APPLICATION-specific integrated circuits
The article reports that representatives from Great Britain's universities have said that research activities need a design infrastructure which offers affordable access to design tools and prototyping facilities. The influential group of academics from the universities of Manchester, Southampton, Belfast, Edinburgh and York were responding to what they see as a "lack of coherence" in microelectronics design activities across Great Britain. Many are calling for a ten year strategy coordinating research into system-on-chip, processors, mixed signal and analogue ICs, and design tools.