POWER resources, MICROELECTRONICS, FIELD programmable gate arrays, APPLICATION-specific integrated circuits, BOUNDARY scan testing, ELECTRIC potential, and DESIGN
The article looks at how designers can maximize the benefits of converting field programmable gate arrays (FPGAs) to application specific integrated circuits (ASICs). It stresses the importance of designing the power-supply scheme for the FPGA core supplies in such a way that they can later be easily changed to another voltage. Boundary-scan-test dependencies can also yield cost savings. It also mentions the importance of timing budgets for the device operating in the system. It offers guidelines on configuration and start-up.
ELECTRONIC industries, FIELD programmable gate arrays, APPLICATION-specific integrated circuits, and ELECTRONIC circuits
Deals with the move of Hier Design to introduce PlanAhead, a hierarchical floorplanner for field programmable gate arrays (FPGA) designs. Problems facing FPGA designers in the electronics industry; Use of virtual-silicon prototyping by digital application specific integrated circuit designers; Devices supported by PlanAhead.
COMPUTER software development, ELECTRONIC systems, DIGITAL signal processing, and FIELD programmable gate arrays
The article explores the roles of electronic-system-level (ESL) technology in electronic design flows. ESL tools are used by project leaders to develop a software-based virtual prototype, by integrating it into the driver code and testing the software system. At MC2 Technology Group, ESL is used to develop the correct algorithms for digital-signal processing (DSP) and field programmable gate arrays (FPGA). Meanwhile, the intellectual-property (IP)-development group within Synopsys used ESL to develop a virtual-prototyping facility from its product line to manage both hardware and software components.
COMPUTER software, ELECTRONIC data processing, FIELD programmable gate arrays, EMBEDDED computer systems, and RTL (Computer program language)
This article discusses the importance of choosing the right prototyping methods to verify embedded software. A system on chip includes many components, such as processors, timers, interrupt controllers, buses, memories and embedded software. The traditional Raster Transfer Language (RTL)-to-layout design-and-verification flow proves inadequate for these multimillion-gate systems, which have the added complexity of embedded software running on them. The advent of virtual platforms allows designers to model hardware-component functions at a higher level of abstraction, which simplifies the debugging of embedded software. Virtual platforms offer reduced development cost, early availability, powerful hardware-visualization features and the ability to model erroneous and rare conditions. In general, virtual platforms provide a better option than traditional approaches to debugging embedded software using field programmable gate arrays (FPGA) boards. For functional testing, virtual prototypes and FPGA prototype boards are useful. For performance tuning, an RTL cosimulation platform helps, especially for small, low-level hardware drivers. Software designers must wait for the silicon prototype of the product to become available before they can do the final performance tuning. The length of the performance-tuning cycle depends on the application in question and generally accounts for 10 to 30 percent of the software-development cycle.
INTEGRATED circuits, FIELD programmable gate arrays, APPLICATION-specific integrated circuits, ELECTRONIC circuit design, SILICON, and PROGRAMMABLE logic devices
Considers the use of the silicon virtual prototyping (SVP) in resolving the propagation-delay and power-consumption values in application-specific integrated circuits and field programmable gate arrays. Problems with resistance in the power- and ground-distribution grid; Implementation of the physical design using SVP; Advantages of using SVP to designers.
BUSINESS enterprises, FIELD programmable gate arrays, and ELECTRONIC systems
Focuses on the use of a field-programmable gate arrays (FPGA) as prototyping vehicles for low-volume applications. Design of FPGA; Reduction of hardware diversity for companies; Collection of configuration files for a range of computer settings.
NEW product development, FIELD programmable gate arrays, APPLICATION-specific integrated circuits, and RTL (Computer program language)
The firm Synopsys has announced Design Compiler (DC) field programmable gate arrays (FPGA), which targets designers who prototype application specific integrated circuits using FPGA. FPGA devices offer enough speed and size to be viable tools for ASIC prototyping and in many cases, substitute for ASIC devices for short periods during product introduction. The product links with Direct Compiler, a product that has practically become a synonym for logic synthesis. DC FPGA accepts the same Raster Transfer Language code, constraint, scripts and intellectual-property libraries as Design Compiler. Although Synopsys mentions only ASIC prototyping as its intended market, designers targeting leading-edge FPGA devices could use DC FPGA as the synthesis tool in their development flow. Prices for a standalone license of DC FPGA start at $36,750 for a one-year technology-subscription license.
EDN Europe. Dec2003, Vol. 48 Issue 12, p62-63. 2p.
SIMULATION methods & models, APPLICATION-specific integrated circuits, FIELD programmable gate arrays, and INTEGRATED circuit verification
Focuses on the adoption of new design methods to improve productivity. Increase in the verification problems due to the complexity of application specified integrated circuits; Preference of designers to use field programmable gate arrays in prototyping their designs; Advantages of using FPGA in improving HDL simulation.
ECONOMIC competition, ELECTRONIC industries, PRICE wars, and FIELD programmable gate arrays
The article looks at the growing competition in the field programmable gate array (FPGA) market. Altera Corp. will begin by converting the lithography of its 0.13-micron-based Cyclone product line to a 90-nanometer process, akin to Xilinx's shrinkage of Virtex-II to come up with Spartan-3. It will then selectively add features such as 250-megahertz, 18x18-bit multipliers, each also configurable as two 9x9-bit multipliers. Altera claims that its EP2C20 device, with 18,572 logic elements will have a 24 percent smaller die than Xilinx's 3S1000 with 15,360 logic elements. The Cyclone II family of Altera is again unfortunately also not pinout-compatible with Cyclone, pushing the hardware prototyping feasibility into early 2005. EP2C35 will cost 22 dollars at the end of 2005 in its smallest package and lowest speed grade. Lattice Semiconductor Corp., with its Economy (EC) and ECP (EconomyPlus) FPGA, echoes the aggressive cost claims of Altera with the assertion that its 0.13-micron chips are comparable in die size to Xilinx's 90-millimeter devices. Consumers will be able to readily test the contentions of Lattice, because it began in July 2004 shipping the first devices, the 49 dollar EC20 and 59 dollar ECP-DSP20, in sample quantities along with companion design-tool suite support.
APPLICATION-specific integrated circuits, FIELD programmable gate arrays, and DESIGN
Explains how the use of flash-based field programmable gate arrays (FPGAs) provides reprogrammable application specific integrated circuit (ASIC) solutions for design verification and rapid prototyping. Back-door approach to accessing ASIC design tools; Flash FPGAs' use of a high-density flash complementary metal oxide semiconductor (CMOS) process with selected ASIC attributes.
SALE of business enterprises, COMPUTER industry, and FIELD programmable gate arrays
The article reports on the sale of the electronic system level business of Celoxica Holdings PLC allowing it to focus on its work in field programmable gate array (FPGA)-based high performance computing. The business was sold to Catalytic for $3 million. With the acquisition, Catalytic expands its algorithm development portfolio, gaining the DK Design Suite, PixelStreams, and Agility Compiler software products, and the RC Series of FPGA development and prototyping boards from Celoxica.
BUSINESS partnerships, AEROSPACE industries, AVIONICS, SOFTWARE verification, and FIELD programmable gate arrays
This article reports on a partnership formed by Actel and Aldec to address the high-reliability requirements of the aerospace and avionics markets with two highly integrated solutions. One is designed to help alleviate the verification bottleneck in the design assurance process with what the companies say is an industry-first hardware/software verification package to ease DO-254 certification. In addition, they are launching a flash-based prototyping solution for the space-optimized RTAX-S field-programmable gate arrays.