Huynh, Khoa D., Fernandez, Eduardo B., and Khoshgoftaar, Taghi M.
The Journal of Systems and Software. July 1992, Vol. 18 Issue 3, p255, 17 p. chart
Systems Software, Scientific Research, Software Design, Distributed Systems, Rapid Prototyping, Real-Time System, Distributed processing (Computers) -- Research, and Real-time systems -- Usage
Many real-time control applications fall into the category of control cycle-driven systems. Usually called frame-based applications, the real-time aspect of this type of system is based on the concept of a control cycle, or frame, during which the input data is sampled, some critical processing on the data is performed, and the appropriate output is generated. If a frame is repeated at a sufficiently fast rate, the system is said to provide continuous control in real time. Several distributed processing approaches appear to be the most appropriate hardware architectures for meeting the requirements of these applications. To support the functional testing, performance analysis, and frame-based software development of these systems, a distributed real-time workload (DRTW) has been designed for use either as a parameterized workload for testing and performance evaluation purposes, or as a rapid software prototyping tool for frame-based applications on single- and multiple-node distributed systems. (Reprinted with the permission of the publisher.)
Neugebauer, Olaf, Engel, Michael, and Marwedel, Peter
The Journal of Systems and Software. March 2017, Vol. 125, 439
Multiprocessing, Embedded system, System on a chip, Real-time system, Embedded systems -- Usage, Real-time control -- Usage, and Real-time systems -- Usage
To access, purchase, authenticate, or subscribe to the full-text of this article, please visit this link: http://dx.doi.org/10.1016/j.jss.2016.08.069 Byline: Olaf Neugebauer [email@example.com] (*), Michael Engel [firstname.lastname@example.org], Peter Marwedel [email@example.com] Keywords Parallelization; Heterogeneous multiprocessor system-on-chip; Embedded systems Highlights * Approach and (software) parallelization infrastructure for embedded systems. * Extract pipeline-, task-, and data-level parallelism * Toolflow combines parallelization, mapping and necessary synchronization. * Enables fast and easy prototyping. Abstract Future low-end embedded systems will make an increased use of heterogeneous MPSoCs. To utilize these systems efficiently, methods and tools are required that support the extraction and implementation of parallelism typically found in embedded applications. Ideally, large amounts of existing legacy code should be reused and ported to these new systems. Existing parallelization infrastructures, however, mostly support parallelization according to the requirements of HPEC systems. For resource-restricted embedded systems, different parallelization strategies are necessary to achieve additional non-functional objectives such as the reduction of energy consumption. HPC-focused parallelization also assumes processor, memory and communication structures different from low-end embedded systems and therefore wastes optimization opportunities essential for improving the performance of resource-constrained embedded systems. This paper describes a new approach and infrastructure inspired by the OpenMP API to support the extraction and implementation of pipeline parallelism, which is commonly found in complex embedded applications. In addition, advanced techniques to extract parallelism from legacy applications requiring only minimal code modifications are presented. Further, the resulting toolflow combines advanced parallelization, mapping and communication optimization tools leading to a more efficient approach to exploit parallelism for typical embedded applications on heterogeneous MPSoCs running distributed real-time operating systems. Author Affiliation: TU Dortmund University, Dortmund, Germany * Corresponding author. Article History: Received 13 May 2015; Revised 15 August 2016; Accepted 21 August 2016