articles+ search results

Neural network, Electrical engineering, Neural networks -- Analysis, and Electrical engineering -- Analysis

Keywords Convolutional neural network; Hardware acceleration; Rapid system prototyping; Binarization; FPGA Abstract The huge model size and high computational complexity make emerging convolutional neural network (CNN) models unsuitable to deploy on current embedded or edge computing devices. Recently the binary neural network (BNN) is explored to help reduce network model size and avoid complex multiplication. In this paper, a binary network acceleration framework for rapid system prototyping is proposed to promote the deployment of CNNs on embedded devices. Firstly trainable scaling factors are adopted in binary network training to improve network accuracy performance. The hardware/software co-design framework supports various compact network structures such as residual block, 1 x 1 squeeze convolution layer, and depthwise separable convolution. With flexible network binarization and efficient hardware architecture optimization, the acceleration system is able to achieve over 2 TOPS throughput performance comparable to modern desktop GPU with much higher power efficiency. Author Affiliation: Department of Electrical Engineering, City University of Hong Kong, Hong Kong, China * Corresponding author. Article History: Received 2 December 2019; Revised 19 February 2020; Accepted 8 March 2020 Byline: Zhe Xu [zhexu22-c@my.cityu.edu.hk], Ray C.C. Cheung [r.cheung@cityu.edu.hk] (*)

Time to market, Product development -- Methods, Systems engineering -- Methods, and Rapid prototyping -- Methods

Keywords Rework; Corrective Iteration; Firefighting; Negative Iteration; Product Development; System Engineering Abstract Given the need to develop a systems engineering framework to enable rapid prototyping and rapid fielding capability for the U.S. Department of Defense (DOD) per Public Law 114-92 and the fact that historically rework has been a problem during product development, a literature survey of engineering and design rework was conducted to better understand its nature and causes. The intent of the survey is to present the current state of research in the understanding of this aspect of development and to articulate future research areas for developing a systems engineering framework during the Technology Maturation and Risk Reduction (TMRR) phase of the DOD life cycle that addresses rework concerns, accelerates iteration and enables rapid prototyping. Since much of the research on rework has been done on information exchange and organizational structure there is a need for future research in systems engineering to develop frameworks to: 1) mitigate the impact of information uncertainty and instability, 2) accelerate information evolution, and 3) reuse knowledge for engineering reasoning. Author Affiliation: (a) Combat Capabilities Development Command (CCDC) Armaments Center, Picatinny Arsenal, 07806, USA (b) Systems Engineering Research Center (SERC), Stevens Institute of Technology, Hoboken, NJ, 07030, USA Byline: Shawn Dullen [shawn.m.dullen.civ@mail.mil] (a), Dinesh Verma (b), Mark Blackburn (b)

Algorithm, Algorithms -- Research, Biosensors -- Research, Rapid prototyping -- Research, and Nanotechnology -- Research

Keywords Nano biosensors; FPGA-NOC; Neural network; nanotechnologies; medical applications; algorithm XY Abstract The paper aims to explore the potential offered by nanotechnologies for the development of a new generation of reconfigurable and robust Nano-biosensors for the purpose of implementation in medical applications The subject proposes to make a contribution in the field of Nano-biosensors by organizing itself around several scientific objectives, multidisciplinary technologies * Demonstrate the interface with reconfigurable architectures based on FPGA/NoC to drive the Nano-biosensors * specify Platform model based on neural networks that can be adapted to Nano biosensors experimental context. Author Affiliation: (a) Universite des Sciences et de la Technologie Mohamed Boudiaf Oran USTO-MB 3100, Algeria (b) LIM research laboratory University of Tiaret, Tiaret 14000, Algeria Byline: Abdelkrim GHAZI [ghazi-abdou10@hotmail.com] (a), Mostefa BELARBI (b), Abdallah CHOUARFIA (a,b)

Virtual reality technology, Virtual reality -- Methods, Rapid prototyping -- Methods, and Video tape editing -- Methods

Byline: Telmo Adao [telmoadao@utad.pt] (a), Luis Padua (b), Miguel Fonseca (b), Luis Agrellos (c), Joaquim J. Sousa (a), Luis Magalhaes (d), Emanuel Peres (a) Keywords Virtual Reality; 360[degrees] Videos Editing; Immersive Digital Panoramas; Multimedia; 3D model; 3D text; Spatialized Sound; Prototyping Abstract While the popularity of virtual reality (VR) grows in a wide range of application contexts -- e.g. entertainment, training, cultural heritage and medicine --, its economic impact is expected to reach around 15bn USD, by the year of 2020. Within VR field, 360[degrees] video has been sparking the interest of development and research communities. However, editing tools supporting 360[degrees] panoramas are usually expensive and/or demand programming skills and/or advanced user knowledge. Besides, application approaches to quickly and intuitively set up such 360[degrees] video-based VR environments complemented with diverse types of parameterizable virtual assets and multimedia elements are still hard to find. Thereby, this paper aims to propose a system specification to simply and rapidly configure immersive VR environments composed of surrounding 360[degrees] video spheres that can be complemented with parameterizable multimedia contents -- namely 3D models, text and spatial sound --, whose behavior can be either time-range or user-interaction dependent. Moreover, a preliminary prototype that follows a substantial part of the previously mentioned specification and implements the enhancement of 360[degrees] videos with time-range dependent virtual assets is presented. Preliminary tests evaluating usability and user satisfaction were also carried out with 30 participants, from which encouraging results were achieved. Author Affiliation: (a) INESC TEC and University of Tras-os-Montes e Alto Douro, 5000-801 Vila Real, Portugal (b) University of Tras-os-Montes e Alto Douro, School of Sciences and Technology, 5000-801 Vila Real, Portugal (c) GEMA - Digital and Technology Agency, Cais das Pedras N.[degrees] 8, 4050-465 Porto, Portugal (d) ALGORITMI Center, University of Minho, 4800-058 Guimaraes, Portugal

Embedded system, System on a chip, Distributed processing (Computers), Microcontroller, Embedded systems -- Design and construction, Rapid prototyping -- Methods, Distributed processing (Computers) -- Methods, and Microcontrollers -- Design and construction

To access, purchase, authenticate, or subscribe to the full-text of this article, please visit this link: http://dx.doi.org/10.1016/j.procs.2018.08.202 Byline: Denis Raskin (a), Alexei Vassiliev (a), Vasili Samarin (a), Diego Cabezas (a), Siti Elda Hiererra (b), Yohannes Kurniawan [ykurniawan@binus.edu] (b) Keywords embedded systems; IoT; internet of things; IT education; microcontrollers Abstract As the fastest growing field of information technologies, Internet of Things is the important question for embedded systems developers. The number of embedded systems in the IoT increases steadily and specialists should be able to implement it faster, without losing any quality level. Current research introduces a way to develop a system using ready-made components, configuring and integrating them among themselves, via high level API. These components represent different parts of distributed embedded system, such as control programs, communication nodes, web applications etc. Our approach presents the easy-to-understand development process, used to support students in learning of embedded systems as a part of IoT. Author Affiliation: (a) Interdepartamental Center of Embedded Systems of Automation and Computing, Peter the Great St. Petersburg Polytechnic University, St. Petersburg, Russia (b) Information Systems Department, School of Information Systems, Bina Nusantara University, Jakarta, Indonesia, 11480

Management science -- Measurement and Rapid prototyping -- Measurement

We propose a platform for the rapid prototyping of active measurement tools to collect network characteristics. Our proposal, named FLAME (Flexible Lightweight Active Measurement Environment), allows the prototyping of active measurement tools that depend or not on cooperative destination nodes. FLAME provides its users with basic active measurement primitives -- corresponding to basic building blocks -- upon which sophisticated active measurement tools can be prototyped quickly, practically, and efficiently through scripts in the Lua scripting language. This platform is based on the distributed deployment of measurement agents in some network nodes. These agents can send and receive probes in response to Lua scripts sent by a user console. Such agents also publish the measurement data in a standardized way in a repository that a central manager keeps, thus simplifying the management and analysis of such data. We validate the FLAME platform as well as show its flexibility and accuracy through experiments on a local testbed and also on Planet-lab. We also evaluate the proposed platform as compared to previous work in terms of the easing of development due to prototype scripting as well as the achieved memory footprint. In conclusion, we discuss different possibilities for further developments built upon the basic functionality of the proposed platform.

Education, Elementary -- Methods, Classroom management -- Methods, Handicraft -- Educational aspects, and Design -- Educational aspects

To access, purchase, authenticate, or subscribe to the full-text of this article, please visit this link: http://dx.doi.org/10.1016/j.ijcci.2017.11.002 Byline: Pauline Gourlet [gourletp@newschool.edu] (a,b,*), Francoise Decortis [francoise.decortis@univ-paris8.fr] (a) Keywords Instruments; Conditions; Classroom; Designerly learning; Making; Research through design; CHAT Abstract During six months in a French elementary classroom with pupils aged 6--7 years old, we have looked for ways to progressively transform an instructional classroom environment. Our aim was to develop a sustainable designerly learning through authentic making activities. In this article, we describe the history of this attempt along with our motivations, with an instrumental approach, i.e., through a description of the activities mediated by the artifacts we have prototyped with the schoolteacher and the pupils. First, we explain what we mean by designerly learning, which refers to making activities with a Cultural Historical Activity Theory (CHAT) perspective, extending the focus of making beyond digital literacy and digital fabrication. Then, we describe our prototypes: a series of artifacts, which sets conditions for pupils to engage in classroom's making activities, and for the teacher to facilitate them. Finally, we discuss how such conditions can help scaffold and structure authentic making activities in a classroom context, and therefore designing these conditions might be a prime means to foster a transition toward a designerly learning in public schools. Author Affiliation: (a) Universite Paris 8, Paragraphe, Saint-Denis, France (b) EnsadLab, Paris, France * Corresponding author at: Universite Paris 8, Paragraphe, Saint-Denis, France. Article History: Received 6 April 2017; Revised 22 October 2017; Accepted 5 November 2017

Programmable logic array and Digital integrated circuits

Performance evaluation of parallel software and architectural exploration of innovative hardware support face a common challenge with emerging manycore platforms: they are limited by the slow running time and the low accuracy of software simulators. Manycore FPGA prototypes are difficult to build, but they offer great rewards. Software running on such prototypes runs orders of magnitude faster than current simulators. Moreover, researchers gain significant architectural insight during the modeling process. We use the Formic FPGA prototyping board [1], which specifically targets scalable and cost-efficient multi-board prototyping, to build and test a 64-board model of a 512-core, MicroBlaze-based, non-coherent hardware prototype with a full network-on-chip in a 3D-mesh topology. We expand the hardware architecture to include the ARM Versatile Express platforms and build a 520-core heterogeneous prototype of 8 Cortex-A9 cores and 512 MicroBlaze cores. We then develop an MPI library for the prototype and evaluate it extensively using several bare-metal and MPI benchmarks. We find that our processor prototype is highly scalable, models faithfully single-chip multicore architectures, and is a very efficient platform for parallel programming research, being 50,000 times faster than software simulation.

Rapid Prototyping, Distributed Systems, Programming Management, Computer Science, and Programming management (Computers) -- Methods

The development of a distributed program is not an easy task. In this paper, we present a set of rapid prototyping tools that can efficiently help the development process of remote procedure call (RPC)-based programs. After some introduction in the first section, we describe the structure of our prototyping tools in the second section. The tool-set consists of three generators: the distributed frame generator, the user interface generator, and the application model generator. Three sections are devoted to describing these generators. The last part of our paper presents a prototyping example using our tool-set and summarizes the paper. (Reprinted by permission of the publisher.)

To access, purchase, authenticate, or subscribe to the full-text of this article, please visit this link: http://dx.doi.org/10.1016/j.procs.2016.05.467 Byline: Xinchen Guo [Xinchen.Guo@asu.edu] (1), Mukul Dave [Mukul.Dave@asu.edu], Mohamed Sayeed [msayeed@asu.edu] (*) Keywords Parallel Programming; Message Passing Interface; Matlab; MEX Functions; Parallel I/O Abstract The HPCmatlab framework has been developed for Distributed Memory Programming in Matlab/Octave using the Message Passing Interface (MPI). The communication routines in the MPI library are implemented using MEX wrappers. Point-to-point, collective as well as one-sided communication is supported. Benchmarking results show better performance than the Mathworks Distributed Computing Server. HPCmatlab has been used to successfully parallelize and speed up Matlab applications developed for scientific computing. The application results show good scalability, while preserving the ease of programmability. HPCmatlab also enables shared memory programming using Pthreads and Parallel I/O using the ADIOS package. Author Affiliation: ASU Research Computing, Arizona State University, Tempe, Arizona, U.S. * Corresponding author. (footnote)[white star] Selection and peer-review under responsibility of the Scientific Programme Committee of ICCS 2016. (footnote)1 Current Affiliation: Purdue University, West Lafayette, Indiana, U.S.

Architecture

To link to full-text access for this article, visit this link: http://dx.doi.org/10.1016/j.sysarc.2015.11.003 Byline: Frank Hannig

Architectural prototyping is the process of using executable code to investigate stakeholders' software architecture concerns with respect to a system under development. Previous work has established this as a useful and cost-effective way of exploration and learning of the design space of a system and in addressing issues regarding quality attributes, architectural risks, and the problem of knowledge transfer and conformance. However, the actual industrial use of architectural prototyping has not been thoroughly researched so far. In this article, we report from three studies of architectural prototyping in practice. First, we report findings from an ethnographic study of practicing software architects. Secondly, we report from a focus group on architectural prototyping involving architects from four companies. And, thirdly, we report from a survey study of 20 practicing software architects and software developers. Our findings indicate that architectural prototyping plays an important and frequent role in resolving problems experimentally, but less so in exploring alternative solutions. Furthermore, architectural prototypes include end-user or business related functionality rather than purely architectural functionality. Based on these observations we provide recommendations for effective industrial architectural prototyping.

The prototyping approach has been considered to be a more effective systems development methodology than the traditional systems development life cycle approach. Prototyping provides a framework for meaningful social interaction between system users and developers. This research examines the social contextual factors that determine the performance of information system projects and addresses the social perspectives of system development methodologies within the prototyping development framework. This study suggests that the full mediators of the prototyping approach were organizational technology learning and user-IS interaction effectiveness. Organizations should use prototyping in situations where these mediators are important to the development process and are not achieved through other organizational practice.