Singhal, S.K., Jain, Prashant K., Pandey, Pulak M., and Nagpal, A.K.
International Journal of Production Research. Nov2009, Vol. 47 Issue 22, p6375-6396. 22p. 1 Color Photograph, 4 Diagrams, 2 Charts, 6 Graphs.
Algorithms, Industrial efficiency, Problem solving, Production (Economic theory), Simulation methods & models, Prototypes, User interfaces (Computer systems), Surface roughness, Sintering, Surfaces (Technology), Sinter (Metallurgy), and Case studies
In the present work an attempt has been made to achieve minimum average part surface roughness (best overall surface quality), minimum build time and support structure for stereolithography (SL) and selective laser sintering (SLS) processed parts by determining optimum part deposition orientation. A conventional optimisation algorithm based on a trust region method (available with MATLAB-7 optimisation tool box) has been used to solve the multi-objective optimisation problem. It is observed that the problem is highly multi-modal in nature and a suitable initial guess, which is used as an input to execute the optimisation module, is important to achieve a global optimum. A simple methodology has been proposed to find out the initial guess so that global minimum is obtained. Finally the surface roughness simulation is carried out with optimum part deposition orientation to have an idea of surface roughness variation over the entire part's surface before depositing the part. Case studies are presented to demonstrate the capabilities of the developed system. The major achievements of this work are consideration of multiple objectives for the two rapid prototyping processes, successful use of conventional optimisation algorithm available with MATLAB to handle multiple objectives and development of graphical user interface-based system. [ABSTRACT FROM AUTHOR]
International Journal of Advanced Manufacturing Technology; Mar2011, Vol. 53 Issue 1-4, p255-265, 11p
CLOUD computing, RAPID prototyping, REVERSE engineering, DATA structures, DATA extraction, LEAST squares, ALGORITHMS, and CASE studies
Direct slicing of point cloud is an effective way to integrate reverse engineering and rapid prototyping. However, since the input of the direct slicing process is discrete point data, connections between the points are absent. The lack of global structure may make the process fail to handle complex shapes that have multicontoured slices. Furthermore, it may cause accuracy loss at some important features, e.g., at topology transitions. In order to overcome the above limitations, this paper presents a method to extract topological structure from the point cloud and applies the structure into a moving-least square (MLS) surface-based direct slicing process. In addition to the topology extraction, two modifications are made to improve the efficiency and stability of the process: (1) a variation of the traditional projection-based MLS surface is adopted; (2) a rectification algorithm is presented in 2D contour generation to avoid biased curves when abrupt curvature changes happen. The improved direct slicing method is tested by some case studies including synthetic and scanned data. The efficacy of the algorithm is demonstrated by the results. [ABSTRACT FROM AUTHOR]
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems. 04/01/2011, Vol. 30 Issue 4, p473-491. 19p.
Prototypes, Algorithms, Industrial design, Field programmable gate arrays -- Design & construction, Systems on a chip, Case studies, and Experiments
Escalating system-on-chip design complexity is pushing the design community to raise the level of abstraction beyond register transfer level. Despite the unsuccessful adoptions of early generations of commercial high-level synthesis (HLS) systems, we believe that the tipping point for transitioning to HLS methodology is happening now, especially for field-programmable gate array (FPGA) designs. The latest generation of HLS tools has made significant progress in providing wide language coverage and robust compilation technology, platform-based modeling, advancement in core HLS algorithms, and a domain-specific approach. In this paper, we use AutoESL's AutoPilot HLS tool coupled with domain-specific system-level implementation platforms developed by Xilinx as an example to demonstrate the effectiveness of state-of-art C-to-FPGA synthesis solutions targeting multiple application domains. Complex industrial designs targeting Xilinx FPGAs are also presented as case studies, including comparison of HLS solutions versus optimized manual designs. In particular, the experiment on a sphere decoder shows that the HLS solution can achieve an 11–31% reduction in FPGA resource usage with improved design productivity compared to hand-coded design. [ABSTRACT FROM AUTHOR]