IEEE Transactions on Power Electronics. Sep2019, Vol. 34 Issue 9, p8715-8723. 9p.
Subjects
Rapid prototyping, Current-voltage characteristics, and Electronic feedback
Abstract
Using a photovoltaic (PV) emulator (PVE) simplifies the testing of the PV generation system. However, conventional controllers used for PVEs suffer from oscillating output voltage, requiring a high number of iterations, or being too complex to be implemented. This paper proposes a controller based on a resistance feedback control strategy that produces a stable and fast converging operating point for the PVE. The resistance feedback control strategy requires a new type of PV model, which is the current–resistance (I–R) PV model. This model is computed using a binary search method at a fast convergence rate. It is combined with a closed-loop buck converter using a proportional-integral controller to form the resistance feedback control strategy. The PVE's controller is implemented into dSPACE ds1104 hardware platform for experimental validation. The acquired experimental results show that the proposed PVE is able to follow the current–voltage characteristic of the PV module accurately. In addition, the PVE's efficiency is more than 90% under maximum power point operation. The transient response of the proposed PVE is similar to the PV panel during irradiance changes. [ABSTRACT FROM AUTHOR]
This paper presents a discrete-time neural inverse optimal control for induction motors, which is implemented on a rapid control prototyping (RCP) system using a C2000 Microcontroller-Simulink platform. Such controller addresses the solution of three issues: system identification, trajectory tracking, and state estimation, which are solved independently. The neural controller is based on a recurrent high order neural network (RHONN), which is trained with an extended Kalman filter. The RHONN is an identifier to obtain an accurate motor model, which is robust to external disturbances and parameter variations. The inverse optimal controller is used to force the system to track a desired trajectory and to reject undesired disturbances. Moreover, the controller is based on a neural model and does not need the a-priori knowledge of motor parameters. A supertwisting observer is implemented to estimate the rotor magnetic fluxes. The hub of the RCP system is a TMS320f28069M MCU, which is an embedded combination of a 32-bit C28x DSP core and a real-time control accelerator. This Microcontroller is fully programmable from the Simulink environment. Simulation and experimental results illustrate the performance of the proposed controller and the RCP system, and a comparison with a control algorithm without the neural identifier is also included. [ABSTRACT FROM AUTHOR]
Gadelovits, Shlomo, Sitbon, Moshe, and Kuperman, Alon
IEEE Transactions on Power Electronics. Oct2014, Vol. 29 Issue 10, p5278-5284. 7p.
Subjects
Rapid prototyping, Solar cells, Direct currents, Electric potential, Switching circuits, and Electric resistors
Abstract
A method of rapid prototyping of a solar array simulator, based on low cost, off-the-shelf components is proposed in the paper. A commercial constant output voltage switching power supply is utilized as a power stage. It is shown that it is possible to gain control over output voltage of such a device by injecting variable analog voltage into the voltage feedback loop of the supply. As a result, by sensing the power supply output current and varying the injected voltage it is possible to change the output voltage according to a predefined relation and hence any static I-V curve may be emulated by the device. For simulating a solar array output characteristics, the desired I-V curve may be either digitized from a manufacturer provided datasheet, obtained experimentally or estimated from three basic current-voltage pairs (open circuit, short circuit, and maximum power points) using a dedicated algorithm. In order to demonstrate the proposed method, a prototype was designed and built based on available low-cost commercial components. Dynamic characteristics of the prototype were experimentally evaluated and three static I-V curves of a commercial solar panel were simulated. The resulting I-V output characteristics were shown to closely resemble datasheet I-V curves. [ABSTRACT FROM AUTHOR]
Monti, Antonello, Santi, Enrico, Dougal, Roger A., and Riva, Marco
IEEE Transactions on Power Electronics. May2003, Vol. 18 Issue 3, p915. 9p. 4 Black and White Photographs, 9 Diagrams, 3 Graphs.
Subjects
Rapid prototyping, Prototypes, and Power electronics
Abstract
Presents a method of rapid prototyping of digital controls for power electronics. Virtual test bed (VTB) environment; Proposed design approach; Co-simulation between VTB and Matlab/Simulink.
Jacobs, Joep, Detjen, Dirk, Karipidis, Claus-Ulrich, and de Doncker, Rik W.
IEEE Transactions on Power Electronics. Mar2004, Vol. 19 Issue 2, p500-507. 8p.
Subjects
Rapid prototyping, Algorithms, Digital signal processing, Power electronics, Cascade converters, and Electric circuits
Abstract
This paper presents three new rapid prototyping took to develop power electronic systems. The effectiveness of these tools is demonstrated by designing and building a shunt active power filter. First, a digital signal processor (DSP) model to embed complex control algorithms has been created for detailed offline simulations with PSpice. This DSP model emulates the discrete behavior of digital control circuits. The control algorithms in the DSP model ace implemented In C-code. Secondly, the control C-code can be downloaded to the !SEADSP for real-time execution. The LSEADSP is a universal DSP control board based on two 80 SHARC processors which execute control algorithms of various nature and highest complexity at 80 MFLOP per second. Thirdly, power electronic building blocks (PEBBs) based on IGBT devices were developed to build and analyze quickly different converter topologies. Combining these three rapid prototyping tools led to a significant reduction of development time of power electronic applications. [ABSTRACT FROM AUTHOR]
IEEE Transactions on Power Electronics. Sep2019, Vol. 34 Issue 9, p8842-8858. 17p.
Subjects
Rapid prototyping and Zero voltage switching
Abstract
A series resonant converter (SRC) using a phase-shift modulation (PSM) was invented to implement the bidirectional power flow. However, it has a narrow zero voltage switching (ZVS) range, which reduces the power conversion efficiency for the light load condition. In this paper, the ZVS condition of the SRC is analyzed according to the power flow directions. From this analysis, the SRC using an extended PSM and single PSM is proposed to obtain the soft switching for the entire load range. The analysis of ZVS condition and performance of proposed control algorithm are verified using simulation and experimental results with a 500-W prototype converter. [ABSTRACT FROM AUTHOR]
Sibué, Jean-Romain, Kwimang, Gatien, Ferrieux, Jean-Paul, Meunier, Gérard, Roudet, James, and Périot, Robert
IEEE Transactions on Power Electronics. Oct2013, Vol. 28 Issue 10, p4690-4699. 10p.
Subjects
Energy transfer, Electric windings, Iterative methods (Mathematics), Magnetic cores, Magnetic devices, and Electric currents
Abstract
This paper presents a design methodology dedicated to a two-winding transformer with large air gap and magnetic cores. To design this kind of components, it is necessary to consider the influence of inductive parameters on electrical magnitudes and the converter, which supplies this magnetic device. Indeed, this kind of a magnetic device has a large leakage inductance and a small magnetizing inductance. Therefore, to transfer the desired power, the transformer needs important reactive energy to magnetize magnetic core and to provide leakage flux. Like inductive parameters can be determined only when geometry is known, sizing has to be iterative. Moreover, resonant converters can be used to compensate inductive behavior, but modify electrical constraints of the transformer. A robust algorithm of design and all necessary tools are presented in order to make it easier to size such components. After the analytical design, 3-D FEM simulations and experimental measurements have been carried out in order to validate the theoretical study. Moreover, the power electronics converter has been optimized in order to improve the efficiency of power transfer. A prototype of 1.6 kW 100 kHz with an air gap of 6 mm has been realized with its converter. The global efficiency is 93.3%. [ABSTRACT FROM AUTHOR]
Spro, Ole Christian, Lefranc, Pierre, Park, Sanghyeon, Rivas-Davila, Juan M., Peftitsis, Dimosthenis, Midtgard, Ole-Morten, and Undeland, Tore
IEEE Transactions on Power Electronics; Sep2020, Vol. 35 Issue 9, p9496-9511, 16p
Subjects
POWER resources, GALVANIC isolation, RAPID prototyping, VIRTUAL prototypes, ELECTROLYTIC corrosion, INDUCTIVE power transmission, THERMAL insulation, and HIGH voltages
Abstract
This article presents the design and optimization of a suitable topology for an isolated dc–dc auxiliary power supply with high isolation voltage and low coupling capacitance. The converter consists of a GaN HEMT inverter operating at 6.78 MHz, an LCC resonance tank, and a class-E low dv/dt rectifier. Furthermore, the galvanic isolation is implemented using a coreless planar transformer that enables higher insulation voltage with similar or better converter efficiency compared to designs using a magnetic material. An analytical design methodology is developed, however, SPICE investigations show that optimal designs might lie outside the validity of the design equations. Consequently, a virtual prototyping tool is developed based on a genetic algorithm with numerical simulations, and in turn, is used to optimize the converter. The optimization algorithm maximizes the converter efficiency while minimizing the transformer size. Prototypes are constructed based on the resulting Pareto front. Experimental results show the validity of the simulated results. Prototypes transferring power up to 15 W with a peak efficiency of 81% are shown. The selected topology enables insulating voltages exceeding 40 kV and coupling capacitances below 10 pF. [ABSTRACT FROM AUTHOR]
IEEE Transactions on Power Electronics; Mar2018, Vol. 33 Issue 3, p2552-2558, 7p
Subjects
ELECTROLYTIC capacitors, ENERGY dissipation, SWITCHING power supplies, FAILURE analysis, RAPID prototyping, and TRANSIENT analysis
Abstract
In this paper, we propose a new capacitor degradation evaluation method aimed at failure prediction and suitable for digitally controlled switching mode power supply (SMPS) for servers. Electrolytic capacitors have one of the highest component failure rates in SMPS; therefore, we attempt to detect an equivalent series resistance degradation of the electrolytic capacitor directly from the data fetched to a digital controller of the SMPS. With a SPICE simulation and a rapid control prototyping evaluation, we confirm the degradation can be detected by the data at a transient response under a normal operation without additional circuits. Even only 10% of a load step change, which commonly occurs in SMPS for servers, causes detectable transient response degradation. [ABSTRACT FROM AUTHOR]
IEEE Transactions on Power Electronics. Jun2017, Vol. 32 Issue 6, p4344-4358. 15p.
Subjects
Process optimization, Cost analysis, Converters (Electronics), Power electronics, and Photovoltaic power generation
Abstract
This paper presents a novel virtual prototyping routine for power electronic converter systems. The approach facilitates a comprehensive and systematic benchmarking of different converter concepts based on a multiobjective optimization regarding the efficiency, power density, and costs. The underlying modeling framework is based on detailed and experimentally verified models. In particular, novel cost data as well as unpublished switching loss and core loss measurements are incorporated. The proposed virtual prototyping routine is employed to carry out a comparative study of the potential of Si and SiC semiconductors in a 10-kW residential three-phase photovoltaic inverter application. For this purpose, a state-of-the-art hard-switched three-level Si insulated-gate bipolar transistor (IGBT) system is compared to a hard-switched and to a soft-switched two-level SiC MOSFET system. The candidate systems for each concept are selected among the \boldsymbol \eta-\boldsymbol \rho -\boldsymbol \sigma Pareto-optimized designs based on the life cycle costs. The hard-switched two-level SiC candidate system is found to be the most attractive solution featuring the lowest life cycle costs. When compared to the Si-based candidate system, not only a better power density and efficiency result. At the same time, besides the lower life cycle costs ( $-$22%), lower component costs ( $-$5%) can also be attained. The attractiveness of the found SiC solution is underlined by the simple control and the lowest component count among all concepts. [ABSTRACT FROM AUTHOR]
IEEE Transactions on Power Electronics; Apr2021, Vol. 36 Issue 4, p3781-3792, 12p
Subjects
ELECTRIC potential, FAULT currents, HIGH voltages, VOLTAGE to frequency converters, and THYRISTORS
Abstract
Commutation failure is a serious malfunction in line-commutated high voltage direct current (HVdc) converters which is mainly caused by the inverter ac faults, and results in a temporary interruption of transmitted power and damage to the converter equipment. In this article, a controllable commutation failure inhibitor (CCFI) is developed which obviates the main drawbacks of the existing power electronic based and fault current limiting based strategies. Under normal circumstances, the developed CCFI improves the steady-state stability and the power transfer capability of the inverter ac lines, while it does not cause excessive voltage stress on the converter valves. In addition, it would reduce the risk of commutation failure occurrence, since it does not lead to any voltage drop in the commutation circuit. When a fault occurs at one of the inverter ac systems, its corresponding CCFI limits the fault current depending on the reduced extinction angle. This would not only inhibit the successive commutation failures on the HVdc converter, but also extend the lifetime of components in the inverter ac systems. The practical feasibility of the developed CCFI is assessed through laboratory testing, using a real-time Opal-RT hardware prototyping platform. The obtained results indicate that the developed CCFI can reliably inhibit the commutation failures during various types of faults. [ABSTRACT FROM AUTHOR]
IEEE Transactions on Power Electronics; Feb2021, Vol. 36 Issue 2, p1994-2008, 15p
Subjects
FINITE element method, MASS production, ELECTRIC inductance, MAGNETIC fields, and ELECTRIC capacity
Abstract
Orthocyclic winding in magnetic components is common in both laboratory prototyping and mass production, especially for round wires with curved edges. However, its impact on winding parasitics, i.e., winding capacitance, ac resistance, and leakage inductance, has not been systematically investigated yet. Omission or inaccurate calculation of these parameters leads to current ringing, additional losses, and even abnormal operations. In this article, three modified formulas for parasitics of orthocyclic windings are proposed, and the impacts of orthocyclic windings are comprehensively studied. Magnetic field distortion and air-gap effect are analyzed and compensated. The formulas are verified by finite-element method (FEM) simulation and experimental results. Finally, normal and orthocyclic windings are compared, and conclusions are listed to illustrate the impact of orthocyclic windings on parasitics. [ABSTRACT FROM AUTHOR]
Rashidi, Niloofar, Burgos, Rolando, Roy, Chris, and Boroyevich, Dushan
IEEE Transactions on Power Electronics; Oct2020, Vol. 35 Issue 10, p10168-10179, 12p
Abstract
Modeling and design with parametric and model-form uncertainty quantification is an alternative to conventional model-based design approaches as it improves the existing modeling practice and validates the model used in the design of power converters. However, in the case of modular multilevel converters (MMCs), uncertainty quantification, as the main step in this design methodology, becomes challenging due to the inherent complexity and sheer size of such units. In this article, these limitations are discussed and a systematic study for developing a simplified testbed for uncertainty quantification of an MMC is presented. To this end, first sensitivity analysis is conducted to identify the key parameters whose tolerances contribute the most to the parametric uncertainty of the selected design variables. Second, the effect of increasing the number of power cells in each arm on the estimated total uncertainty, and thus the predictive capability of the MMC simulation models for medium- and high-voltage applications is studied. A simplified testbed for model validation of the power cell in the design of an MMC is developed accordingly. The development of this simplified testbed allows validating the models used and estimating uncertainties in the design with less computational cost and hardware prototyping. [ABSTRACT FROM AUTHOR]
Hilal, Alaa, Raulet, Marie-Ange, Martin, Christian, and Sixdenier, Fabien
IEEE Transactions on Power Electronics. Apr2015, Vol. 30 Issue 4, p2232-2238. 7p.
Subjects
Energy dissipation, Magnetic particles, DC-to-DC converters, Power electronics, Electric circuits, and Electric inductors
Abstract
In power electronics applications, magnetic components are often subjected to nonsinusoidal waveforms, variable frequencies, and dc bias conditions. These operating conditions generate different losses in the core compared to sinusoidal losses provided by manufacturers. In the conception and design stage, lack of precise losses diagnosis has unacceptable effects on system's efficiency, reliability, and power consumption. Since virtual prototyping is used to predict and improve system's behavior before realization, losses and behavior prediction of components is possible. Circuit simulators and their compatible components models are required. This paper is summarized by proposing nonlinear dynamic model of powdered material magnetic core for use in circuit simulators. It includes the material's nonlinear hysteresis behavior with accurate winding and core modeling. The magnetic component model is implemented in circuit simulation software “Simplorer” using VHDL-AMS modeling language. Waveforms and losses of a powder core inductor in a buck converter application are simulated and compared to measured ones. The model is validated for different ripple currents, different loads, and a wide frequency range. DC bias is taken into account in both continuous and discontinuous conduction modes. [ABSTRACT FROM AUTHOR]
Zarghani, Mostafa, Mohsenzade, Sadegh, and Kaboli, Shahriyar
IEEE Transactions on Power Electronics; Oct2019, Vol. 34 Issue 10, p9573-9584, 12p
Subjects
POWER semiconductor switches, INSULATED gate bipolar transistors, TRANSISTORS, SHORT circuits, ELECTROSTATIC discharges, DRUG side effects, and POWER resources
Abstract
Clamp mode snubbers are very well suited for the series structure of the insulated-gate bipolar transistors (IGBTs) in pulsed power applications. They properly meet the necessities expected from them such as the fast operating of the series IGBTs since they have no effect on the gate side. In addition, they can provide safe voltage condition for the IGBTs in short circuit faults, which are very probable in pulsed applications. The clamp mode snubber can perform its voltage balancing task whenever the power capacity of the snubber can support the injected powers due to the voltage unbalancing factors. This paper initially introduces the main factors injecting power to the snubbers. Then, it will be illustrated that the exact injected power to each predetermined snubber cannot be determined due to the uncertainties about the effect of the voltage unbalancing factors. Although it is impossible to determine the exact value of the power injected to each snubber, the total injected powers to the snubbers can be calculated. Therefore, as an effective remedy, this paper proposes a concentrated snubber. Using the proposal, all the injected powers are conducted to a centralized circuit and can be easily managed. In addition, analytical expressions are provided for proper dimensioning of the proposed concentrated snubber elements. Furthermore, the performance of the proposed concentrated snubber is evaluated using simulations and experimental prototyping. [ABSTRACT FROM AUTHOR]
Ohn, Sungjae, Yu, Jianghui, Rankin, Paul, Sun, Bingyao, Burgos, Rolando, Boroyevich, Dushan, Suryanarayana, Harish, and Belcastro, Christopher
IEEE Transactions on Power Electronics; Sep2019, Vol. 34 Issue 9, p8599-8612, 14p
Subjects
UNINTERRUPTIBLE power supply, ELECTROMAGNETIC interference, BATTERY chargers, HEART conduction system, and SILICON carbide
Abstract
With superior loss characteristics, wide bandgap devices such as silicon carbide (SiC) mosfets are expected to replace Si-IGBTs in grid-connected applications. Uninterruptible power supply (UPS) is an application in which low conduction-loss and switching-loss from SiC devices can largely improve the system efficiency. However, fast switching of an SiC mosfet worsens the electromagnetic interference (EMI). In addition, the UPS is comprised of multiple converters wherein different combinations of the converters take part in power-transfer depending on the mode of operation. This complicates the prediction and strategies for noise, especially the common-mode (CM) part. Such complexity calls for deliberate strategies to be set before prototyping to contain and mitigate the CM noise. In this paper, a three-terminal CM circuit model is presented for a three-phase UPS with an active battery charger and a battery rack. The significance of a dc–dc converter on CM EMI generation and propagation has been analyzed based on the model. In a mode of operation where the dc–dc converter is active, a considerable amount of the CM noise is generated from the dc–dc converter. Also, the multiple resonances on the propagation path associated with dc inductors and the battery rack highly deteriorates CM EMI. As a mitigation strategy in the design phase, different topologies and pulsewidth modulation schemes for the ac–ac stage and the dc–dc stage have been compared based on the model. A 20-kW full-SiC UPS has been built and tested to experimentally verify the impact of the dc–dc converter operation on the noise and to validate the mitigation strategy. [ABSTRACT FROM AUTHOR]
IEEE Transactions on Power Electronics; Aug2019, Vol. 34 Issue 8, p7278-7291, 14p
Subjects
ELECTRIC power distribution grids, ELECTRIC power failures, AC DC transformers, HYBRID power systems, and ELECTRIC inverters
Abstract
Cascading fault is one of the serious challenges in hybrid ac/dc power grids, which initiates from a dc or a severe inverter ac fault and leads to a blackout in the inverter ac side. However, owing to the fact that dc faults do not cause commutation failure, the existing commutation failure inhibition approaches are not effective in the prevention of cascading faults caused by dc fault. In order to resolve the challenge, this paper first develops a hybrid ac/dc relay (HADR) based on the positive-sequence component, which can detect and locate the fault events in hybrid ac/dc networks. Subsequently, an integrated control and protection scheme is presented using the developed HADR and a thyristor-controlled series compensator. The proposed scheme has the ability to prevent the blackouts caused by cascading fault using transmission capacity enhancement of the ac line and load-shedding in the inverter ac system. The salient feature of the proposed scheme is that it provides a very economical way to compensate for the loss of power caused by HVdc line outage. In addition, it does not require communications among the relays. The practical performance and feasibility of the proposed scheme is validated by laboratory testing, using the real-time Opal-RT hardware prototyping platform. The experimental results demonstrate that the proposed strategy can effectively inhibit the blackouts caused by cascading fault in hybrid ac/dc networks. [ABSTRACT FROM AUTHOR]
Kovacevic, Ivana F., Friedli, Thomas, Musing, Andreas M., and Kolar, Johann W.
IEEE Transactions on Power Electronics. Jan2014, Vol. 29 Issue 1, p135-149. 15p.
Subjects
Prototypes, Electromagnetic compatibility, Electric filters, Electromagnetic interference, Boundary element methods, and Cascade converters
Abstract
The electromagnetic compatibility (EMC) analysis of electromagnetic interference (EMI) filter circuits using 3-D numerical modeling by the partial element equivalent circuit (PEEC) method represents the central topic of this paper. The PEEC-based modeling method is introduced as a useful tool for the prediction of the high frequency performance of EMI input filters, which is affected by PCB component placement and self- and mutual-parasitic effects. Since the measuring of all these effects is rather difficult and time consuming, the modeling and simulation approach represents a valuable design aid before building the final hardware prototypes. The parasitic cancellation techniques proposed in the literature are modeled by the developed PEEC-boundary integral method (PEEC-BIM) and then verified by the transfer function and impedance measurements of the L-C and C-L-C filter circuits. Good agreement between the PEEC-BIM simulation and the measurements is achieved in a wide frequency range. The PEEC-BIM method is implemented in an EMC simulation tool GeckoEMC. The main task of the presented research is the exploration of building an EMC modeling environment for virtual prototyping of EMI input filters and power converter systems. [ABSTRACT FROM AUTHOR]