"The purpose of this memorandum is to memorialize the planning and execution timeline for the Washington, D.C., National Guard's involvement in the January 6, 2021 First Amendment Protests in Washington, D.C." Late in the afternoon on January 11, 2021, the Defense Department changed the title of its January 8 memorandum and reissued it "to more appropriately reflect the characterization of the events at the U.S. Capitol on January 6." The retitled summary is the "January 6, 2021 Violent Attack at the U.S. Capitol" and the introduction changed to: "This timeline is intended to memorialize the planning and execution efforts of the Department of Defense to address the Violent Attack at the U.S. Capitol on January 6, 2021." The original memorandum was signed by US Navy Captain David Soldow, Executive Secretary. The updated memorandum was unsigned

Review of the Department of Justice’s planning and implementation of Its "Zero Tolerance" policy for immigration offenses involving illegal entry and attempted illegal entry into the United States and its coordination with the Departments of Homeland Security and Health and Human Services. The Inspector General report concluded that President Donald Trump, ex-Homeland Security Secretary Kirstjen Nielsen, then-Attorney General Jeff Sessions, and other senior officials were woefully unprepared when U.S. agents started seizing thousands of migrant children from their asylum-seeking parents and relatives who were often imprisoned in concentration camps after entering the United States, first in a 2017 DOJ pilot program and then nationwide the following year. The report, based on interviews with dozens of DOJ officials and a review of over 200,000 emails and other electronic files, directly implicates Trump in the disastrous policy. It also found that senior administration officials were "fully aware" that the policy would result in children being separated from their families but pressed ahead with it anyway

Today's data-driven applications, such as big data analytics, neural networks, and machine learning, require huge memory and computing resources. The latency and energy incurred for data movement between processing unit and memory has become a significant limitation (known as the "memory wall") as traditional techniques such as caching are no longer effective for the data-intensive applications that dominate modern computing. Solving the "memory wall" problem requires future computer technology to directly integrate memory and transistor devices with high density vertical interconnect accesses (vias) to provide parallel, high bandwidth memory access. However, the high temperature of silicon processing is not compatible with this 3D monolithic integration. A desired low temperature integration can be achieved by using two-dimensional (2D) materials which have intrinsically layered and flat atomic structures, because devices made of 2D materials can be fabricated at lower temperatures. This thesis introduces three exploratory studies on advancing 2D materials for developing 3D monolithic integrated systems. First, I focused on improving transistor performance and studied high-mobility 2D material black phosphorous (BP) transistors using various metals as the contact metal. This work achieved unipolar n-type BP transistors by using ultra-low work function metals, demonstrating record high n-type current. Furthermore, the study revealed the physical mechanisms of controlling doping and de-pinning effects for n- and p- type BP transistors. Beyond transistor studies, I then demonstrated the first 3D sequential monolithic integrated two levels of 1-transistor-1-resistor (1T1R) memory cells. The cell is fabricated entirely using 2D materials: hexagonal-Boron Nitride (hBN) serves as the resistive switching memory cell and monolayer Molybdenum Disulfide (MoS2) serves as the channel material for the transistor selector. In order to achieve a high-density memory array, a two-terminal selector with a high nonlinear current-voltage characteristic is necessary. I developed a new two-terminal selector utilizing a 2D material heterostructure with an H-shape energy barrier. This new device design in theory should have high on-state current density and virtually unlimited endurance due to its quantum tunneling mechanism. Our results characterized the first out-of-plane current through an ultra-thin (3 monolayer) heterojunction and provide the critical foundation for a high endurance selector using a 2D heterojunction. Due to the transferable feature of 2D materials, these processes can be easily adopted for 3D monolithic integrated transistors and memories in multiple logic and memory layers connected vertically by fine-grained nanoscale vias, thereby overcoming the "memory wall.".